1. Field
Example embodiments relate to methods of operating memory devices, and more particularly, to methods of operating NAND flash memory devices including reading or verifying a programmed state of a selected memory cell.
2. Description of the Related Art
Nonvolatile memory devices are storage devices that preserve stored data even when the supply of power is cut off. Floating gate flash memory devices, which are operated by storing electric charges in a floating gate formed of a conductor (e.g., polysilicon), have been commercialized as large capacity nonvolatile memory devices. A memory cell of a flash memory device may be classified into a single level cell (SLC) in which two states are recorded in one cell (e.g., “1” and “0”) and a multi-level cell (MLC) in which four or more states are recorded in one cell (e.g., “11”, “10”, “01”, and “00”). MLC technology is used to make large capacity NAND or NOR flash memory devices.
In order to determine a programmed state of a selected memory cell in a NAND flash memory device, a current path needs to be formed between a bit line BL and ground, through non-selected memory cells. A verify voltage Vverify or a detect voltage Vreference is applied to the selected memory cell to be verified or read and a pass voltage Vread is applied to the non-selected memory cells. The pass voltage Vread is used to enable the non-selected memory cells to be turned on irrespective of the programmed state of the non-selected memory cell. For example, during a read operation, about 0V may be applied to a word line WL to which the selected memory cell is connected, a pass voltage Vread of about 6V may be applied to word lines to which the non-selected memory cells are connected, and a voltage of about 1V may be applied to the bit line BL.
When about 0V is applied to the word line WL to which the selected memory cell is connected, if the selected memory cell is in an erased state, a threshold voltage Vth becomes a negative value. If the selected memory cell is an SLC, since a cell transistor is turned on, current begins to flow when the non-selected memory cells that are connected in series provide a current path. As a result, charges drain from the bit line BL that is pre-charged and the voltage of the bit line BL is reduced, making it possible for a sensing circuit to determine that the selected memory cell is in an erased state. If the selected memory cell, however, is in a programmed state, a threshold voltage Vth becomes a positive value. Because the selected memory cell is turned off, charges may not drain from the bit line BL that is pre-charged and the voltage of the bit line BL is maintained, thereby making it possible for the sensing circuit to determine that the selected memory cell is in a programmed state.
The pass voltage Vread is difficult to set due to the small margin in which it may be set. The pass voltage Vread must be large enough to turn on a cell transistor and form a channel irrespective of the programmed state of each of the memory cells. If the pass voltage Vread increases, a turn-on resistance of each of the memory cells decreases, which is desirable. However, a risk of gradually and undesirably programming the memory cell increases. For this reason, it is difficult to sufficiently increase the pass voltage Vread. Additionally, if the pass voltage Vread is too low, programmed memory cells may not be sufficiently turned on. It is difficult to sufficiently increase or decrease the pass voltage Vread due to these considerations. If the memory cell that is in the programmed state is an MLC that may program 2-bit data to have four states (e.g., 11, 10, 00, and 01), because a threshold voltage of the memory cell is maximally about 4V, the pass voltage Vread is generally determined to be about 6V by adding a margin of about 2V to the maximum threshold voltage of the memory cell.
The verify voltage Vverify or the detect voltage Vreference is used to determine a programmed state or a programmed level of the selected memory cell. The verify voltage Vverify is used to verify whether the selected memory cell is programmed to a desired programmed state during a program operation. The detect voltage Vreference is used to detect to what programmed state of the selected memory cell is set after the program operation. In operation of an SLC, the verify voltage Vverify or the detect voltage Vreference, is used to determine whether the selected memory cell is programmed to have a state 1 or 0, and may use about 0V in general. In operation of an MLC, the verify voltage Vverify may be about 1V, 2V, or 3 V and the detect voltage Vreference may be about 0.5V, 1.5V, or 2.5 V according to programmed states. If the MLC has states “11” (an erased state), “10”, “00”, and “01”, in the order in which a threshold voltage increases, the detect voltage Vreference of about 0.5 V may be used to determine whether the selected memory cell is programmed to have the state “11” or “10”, and the detect voltage Vreference of about 1.5 V may be used to determine whether the selected memory cell is programmed to have the state “10” or “00”, and the detect voltage Vreference of about 2.5 V may be used to determine whether the selected memory cell is programmed to have the state “00” or “01”.
During a verify or read mode, the pass voltage Vread applied to neighboring memory cells may affect the channel of the selected memory cell, thereby making it difficult to determine whether the selected memory cell is in a programmed state or in an erased state. Because a channel voltage of the selected memory cell increases as the pass voltage Vread applied to control gates of the neighboring memory cells increases, the selected memory cell that is programmed to have the state “0” may be read as having the state “1”, thereby increasing the possibility of detecting an error bit. The phenomenon where the pass voltage Vread applied to the neighboring memory cells affects to the channel of the selected memory cell may be referred to as a short-channel effect.
For explanatory purposes, it is assumed that each of the memory cells has a size of less than 32 nm. If a pass voltage Vread of about 6V is applied to cells closest to the selected memory cell, a threshold voltage of the selected memory cell may be reduced below about 0V due to the pass voltage Vread applied to the closet memory cells. As the size of each of the memory cells decreases, the threshold voltage of the selected memory cell may be shifted toward a more negative value. If the verify voltage Vverify or the detect voltage Vreference applied to the selected memory cell is about 0V, a programmed state of the selected memory cell may not be read, thereby failing to determine whether the selected memory cell is programmed to have the state “1” or “0”. Instead, the programmed state of the selected memory cell may be read when the verify voltage Vverify or the detect voltage Vreference applied to the selected memory cell is a negative value, reduced from 0V by a decrement corresponding to the contribution of the closest memory cells. The threshold voltage of the selected memory cell decreases due to the closest memory cells.
However, it is difficult to apply a negative voltage to a control gate during the operation of the NAND flash memory device. In order to reduce the influence of the closest cells on the selected memory cell and avoid a negative verify voltage Vverify or the detect voltage Vreference, the pass voltage Vread must be less than about 6V during a verify or read mode.